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<h1>Senior Standard Cell Library Engineer</h1><p><strong>Location:</strong> US, California, Santa Clara, US, California, Folsom</p><p><strong>Time Type:</strong> Full time</p><h3>Job Description</h3><h1><b>Job Details:</b></h1><p></p><p></p><h2>Job Description: </h2><div><p><b><u><span>About the Organization</span></u><span> </span></b><span><span> </span></span><br /><span><span>Intels Foundry </span><span>Standard Cell</span><span> </span><span>team </span><span>is </span><span>seeking</span><span> a talented and motivated Senior </span><span>Design Engineer</span><span> to join </span><span>our </span><span>growing team</span><span>. In this role, you will design</span><span> leading edge experiments</span><span> to</span><span> develop, </span><span>characterize</span><span>, and </span><span>test</span><span> </span><span>standard cells</span><span>.</span><span> </span><span>You will play a critical role in enabling </span><span>customer</span><span>s</span><span> by</span><span> </span><span>listening to their needs and </span><span>building</span><span> </span><span>the solutions</span><span>.</span></span><span><span> </span></span><br /><span><span> </span></span><br /><b><u><span>Key Responsibilities</span></u><span> </span></b></p></div><div><ul><li><span><span>Defines, implements, characterizes, and </span><span>validates</span><span> design solutions to meet design requirements for power, performance, area (PPA), manufacturability, and cost. </span></span><span> </span></li><li><span><span>Capable of implementing all aspects of the physical design flow, including standard cell circuit, layout, extraction, characterization, and optimization of timing, congestion, power, signal integrity, and reliability to achieve goals. </span></span><span> </span></li><li><span><span>Collaborates closely with all standard cell collateral</span><span> to understand design requirements and develop robust implementation and validation strategies. </span></span><span> </span></li><li><span><span>Reviews and validate</span><span>s</span><span> </span><span>work to</span><span> ensur</span><span>e</span><span> compliance with design, manufacturing, and quality requirements. </span></span><span> </span></li><li><span><span>Fast turn-around experiments - devising experiments, running them end to end, and guiding data driven decisions across multiple audiences (peer working groups, management, and technical leaders). </span></span><span> </span></li><li><span><span>Run end</span><span>-</span><span>to</span><span>-</span><span>end flows to generate, </span><span>validate</span><span>, and release custom standard cell collateral per on demand requests</span><span>.</span></span><span> </span></li></ul><p></p><p><u><b><span>Core Competencies </span></b></u></p></div><div><ul><li><span><span>Strong written and verbal communication skills are </span><span>required</span><span> with the ability to tailor </span><span>the communication</span><span> based on the audience</span><span>.</span></span><span> </span></li></ul></div><div><p><span> </span></p></div><p></p><p></p><h2><b>Qualifications:</b></h2><div><p><span><span>The Minimum qualifications lis</span><span>ted below </span><span>are </span><span>required</span><span> to be initially considered for this position</span><span>. </span><span>Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the </span><span>minimum</span><span> requirements and are considered a plus factor in </span><span>identifying</span><span> top candidates.</span><span> </span></span><span> </span></p></div><div><p></p><p><b><span>Minimum Qualifications:</span><span> </span></b></p></div><div><div><ul><li><span><span>Bachelors degree in</span><span>:</span><span> Electrical Engineering</span><span>, </span><span>Ele</span><span>ctroni</span><span>cs </span><span>Engin</span><span>eering, </span><span>N</span><span>anos</span><span>cience</span><span>, </span><span>M</span><span>ic</span><span>r</span><span>o</span><span>elec</span><span>tro</span><span>nics, </span><span>Computer Engineering</span><span>,</span><span> or </span><span>a STEM</span><span> related field</span><span>.</span></span><span> </span></li><li>2+ years experience in one or more of the following: <ul><li>Standard cell layout </li><li>Standard cell abstract modeling </li><li>Standard cell characterization </li><li>ASIC design and verification </li></ul></li><li>Experience using one or more of the following tools: Cadence Virtuoso, Synopsys Custom Compiler, Cadence Abstract Generator, Synopsys PrimeLib, Cadence Liberate, Synopsys Fusion Compiler, Cadence Innovus, Cadence Tempus, Synopsys PrimeTime, Synopsys HSpice, Synopsys StarRC, Synopsys ICV, Cadence Pegasus, Siemens Calibre.</li></ul></div><div><p><span> </span></p></div><div><p><b><u><span>Preferred Qualifications:</span></u><span><span> </span></span><span> </span></b></p></div><div><ul><li><span><span>Post Graduate Degree in</span><span>:<span> </span>Electrical Engineering</span><span>, </span><span>Ele</span><span>ctroni</span><span>cs </span><span>Engin</span><span>eering, </span><span>N</span><span>anos</span><span>cience</span><span>, </span><span>M</span><span>ic</span><span>r</span><span>o</span><span>elec</span><span>tro</span><span>nics, </span><span>Computer Engineering</span><span>,</span><span> or </span><span>a STEM</span><span> related field</span><span>.</span></span><span> </span></li><li><span><span>Unix proficiency</span><span> and basic software skills using command line languages (</span><span>csh</span><span>, bash, </span><span>perl</span><span>, python) are highly valued.</span></span><span> </span></li></ul></div><div><p><span> </span></p></div><div><p><span><span>We are looking for innovative thinkers ready to make an impact </span><span>in</span><span> the evolving semiconductor landscape. Apply today and be part of Intels mission to create technologies that connect and enrich lives globally.</span></span></p></div></div><p></p><p> </p><p></p><p></p><h2>Job Type:</h2>Experienced Hire<p></p><p></p><h2>Shift:</h2>Shift 1 (United States of America)<p></p><p></p><h2>Primary Location: </h2>US, California, Santa Clara<p></p><p></p><h2>Additional Locations:</h2>US, California, Folsom<p></p><p></p><p></p><p></p><h2>Posting Statement:</h2>All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.<h2></h2><h2>Position of Trust</h2>N/A<p></p><h2>Benefits</h2><p></p><p>We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the <a><span><u>benefits of working at Intel</u></span></a>. </p><p> </p><p> </p>Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD<p> </p><p> </p>The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.<p> </p><p> </p><p></p><p><b>Work Model for this Role</b></p>This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.<p></p><p>*</p><p></p>ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
